This paper introduced and desinged an interface circuit by means of large scale integrated circuit PMM8713.
介紹了用大規(guī)模集成電路PMM871 3設計的控制和驅(qū)動 3相、4相步進電機的通用步進電機接口電路 。
A compilation/generation method for test program of large scale integrated circuit (LSI), called Fault Simulation Method is presented in this paper.
本文敘述了一種名為故障模擬法的大規(guī)模集成電路的測試程序的編制、生成方法，這種方法主要是解決了隨著大規(guī)模集成電路的發(fā)展，單個電路本身的輸入／輸出管腳數(shù)量不斷增加，帶來測試矢量呈現(xiàn)指數(shù)增長，從測試時間和測試成本上考慮，使用傳統(tǒng)的窮舉法已經(jīng)不可能編制、生成出符合要求的大規(guī)模集成電路測試程序的問題。
Research on Parallel Seam Sealing Process for LSI;
大規(guī)模集成電路的平行縫焊工藝研究
A kind of super purification control system which can realize the high spotless environment for LSI s manufacturing is introduced.
介紹了一種實現(xiàn)大規(guī)模集成電路 (LSI)無塵生產(chǎn)環(huán)境的超凈化控制系統(tǒng) ,該系統(tǒng)的現(xiàn)場控制回路采用了先進的仿人工智能PID控制算法 ,這種算法避免了系統(tǒng)反饋滯后的振蕩缺陷 ,利用LonWorks的網(wǎng)絡技術 ,實現(xiàn)整體凈化系統(tǒng)的智能化、可視化控制。
The method will make the circuit more terse and reliable by using the LSI is pLSI1016 chip of lattice corporation as the core.
介紹了一種基于FPGA芯片設計FSK調(diào)制解調(diào)器的基本原理,并給出相應的VHDL語言描述,該設計以Lattice公司的大規(guī)模集成電路ispLSI1016芯片為核心,使得電路簡潔、可靠性高。
Our algorithm not only avoids polynomial deflation but also is more efficient than traditional rootfinding algorithm and it is fit for being realized by VLSI.
該算法避免了多項式降次,計算量又遠遠小于經(jīng)典的搜索算法,適于用大規(guī)模集成電路實現(xiàn),而且可以推廣應用于求解更高階LSF參數(shù)。
With the appearance of VLSI ATE,Auto test technology has been wide used,So production of IC validation is efficiency,This paper has introduced the typical flow of test in IC electric parameter,Then explain the basic principle of test and imaginable result.
隨著大規(guī)模集成電路自動測試設備的出現(xiàn),自動測試技術被廣泛應用,實現(xiàn)了高效率的集成電路產(chǎn)品驗證,這就使得應用自動測試設備有了一定的流程。
With the development of VLSI(Very Large Scale Integration), the integrity becomes larger and larger, from hundreds of thousand to millions or tens of millions, and it becomes more difficult to finish the verification task.
隨著大規(guī)模集成電路的發(fā)展,其設計規(guī)模不斷增加,從幾十萬門級發(fā)展到百萬、千萬門級,完成相應的驗證工作也變得越來越困難,給相應的驗證工作帶來了巨大的挑戰(zhàn)。
Test methods of total dose effects in very large scale integrated circuits;
大規(guī)模集成電路總劑量效應測試方法初探